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Electrical characteristics
2.1.3
Output driver characteristics
The following table provides information on the characteristics of the output driver strengths.
Table 3. Output drive capability
Driver Type
Local bus interface utilities signals
PCI Signal
DDR2 signal
DUART, system control, I2C, SPI, JTAG
GPIO signals
2.1.4
Input capacitance specification
Output Impedance
( Ω )
42
25
18
42
42
Supply Voltage (V)
OV DD = 3.3
GV DD = 1.8
OV DD = 3.3
OV DD = 3.3
The following table describes the input capacitance for the SYS_CLK_IN pin in the MPC8309.
Table 4. Input capacitance specification
Parameter/Condition
Input capacitance for all pins except SYS_CLK_IN and
Symbol
C I
Min
6
Max
8
Unit
pF
Note
—
QE_CLK_IN
Input capacitance for SYS_CLK_IN and QE_CLK_IN
C ICLK_IN
10
—
pF
1
Note:
1. The external clock generator should be able to drive 10 pF.
2.2
Power sequencing
The device does not require the core supply voltage (V DD ) and I/O supply voltages (GV DD and OV DD ) to
be applied in any particular order. Note that during power ramp-up, before the power supplies are stable
and if the I/O voltages are supplied before the core voltage, there might be a period of time that all input
and output pins are actively driven and cause contention and excessive current. In order to avoid actively
driving the I/O pins and to eliminate excessive current draw, apply the core voltage (V DD ) before the I/O
voltage (GV DD and OV DD ) and assert PORESET before the power supplies fully ramp up. In the case
where the core voltage is applied first, the core voltage supply must rise to 90% of its nominal value before
the I/O supplies reach 0.7 V; see Figure 3 . Once both the power supplies (I/O voltage and core voltage) are
stable, wait for a minimum of 32 clock cycles before negating PORESET.
NOTE
There is no specific power down sequence requirement for the device. I/O
voltage supplies (GV DD and OV DD ) do not have any ordering requirements
with respect to one another.
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
10
Freescale Semiconductor
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